The final mark will be expressed in numerical form ranging from 0 to 10, according to the valid regulation (Royal decree 1125/2003 of 5 September; BOE 18th September).

Following the guidelines of the degree the students will be offered two assessment systems: continuous assessment and final assessment.

CONTINUOUS EVALUATION:

The students must choose at the beginning of the term between continuous assessment or final assessment.

Laboratory class attendance is compulsory if the student has chosen continuous assessment.

The students who have chosen continuous assessment can only miss two laboratory sessions as a maximum.

Theoretical class attendance is considered crucial to achieve success in continuous assessment.

The fact of not attending theoretical classes alone will not imply the loss of the right to continuous assessment, but the student will have to study the theoretical concepts and prepare the laboratory practices on their own.

The students who are following continuous assessment and attend theoretical clases regularly (maximum 2 absences) will be given the following advantages:

· If they fail the first theoretical exam in the middle of the term, they will be given the opportunity to repeat it at the end of the term.

· If they fail the subject at the end of the term, the marks of the parts of the subject (first theoretical exam, second theoretical exam, laboratory) which are above the required minimum will be kept until July’sevaluation.

The students that pass the course by means of continuous assessment will not be allowed to repeat any task in the final assessment in order to improve the mark.

The students will develop the laboratory practices and the laboratory projects in groups of two students during the continuous assessment, whenever possible. Both students will be given the same mark if they have attended the laboratory classes together and show that they have worked together in the realisation of the practices and laboratory assignments.

The total mark will be the sum of the marks obtained in the different tasks of the subject.

To pass the subject, it is necessary that:

· The mark of each one of the theoretical exams is equal or greater than 4 over10.

· The global mark of the laboratory tasks is equal or greater than 4 over 10.

· The student reaches the minimum requirements in the two laboratory assignments.

· The global mark of the subject is equal or greater than 5 over 10.

The different tasks have to be delivered on the date specified by the professor,otherwise they will not be assessed.

In case the students pass all the different tasks, the final mark (FM) will be the weighted sum of the marks of each part of the subject:

FM = 0.25* TE1 + 0.25 * TE2 + 0.10 * LP + 0.20 * AP1 + 0.20 * AP2

In case the students do not pass any of the tasks of the subject (mark of any task < 4), the final mark (FM) will be:

FM =Minimum [4.5; (0.25 * TE1 + 0.25 * TE2 + 0.10 * LP + 0.20 * AP1 + 0.20 * AP2) ]

Being:

· TE1 = First partial theoretical examination.

· TE2 = Second partial theoretical examination.

· LP = Mark of the guided laboratory practices corresponding to lessons 5.

· AP1 = Laboratory Autonomous Project that consists of the design of a complex peripheral.

· AP2 = Laboratory Autonomous Project that consists of the design of a medium-complexity embedded system.

ASSESSMENT CRITERIA.

Theoretical examinations.

The first theoretical examination will be scheduled around the eighth week of classes in the place and date determined by the faculty. It will include practical problems and test questions on the topics of theoretical lessons 1 to 8 (except hardware/software partitioning from lesson 8).

The second theoretical examination will be scheduled together with the term’s final examin the place and date determined by the faculty. It will include practical problems on all the topics that have been studied in the subject but,fundamentally, hardware/software partitioning from theoretical lesson 8 and theoretical lessons 9 to 11.

Thestudents will have to answer all the exam questions correctly to obtain the maximum mark.

Laboratory guided practices (only for continuous evaluation).

Only the correct operation of the circuits and programs developed in the laboratory sessions which correspond to the laboratory lesson 5 will be evaluated, according to the evaluation criteria.

The total mark of the assessable laboratory practices (LP) corresponds to the 10% of thetotal mark of the subject. It will be necessary to deliver the required source files.

Autonomous laboratory assignments (only for continuous evaluation).

Assignment1. Complex peripheral. Design of a peripheral for the microprocessor used in the subject. The peripheral has to be formed by a control unit and an ALU,according to the method studied in the theoretical lesson 9 of the subject.

Assignment2. Embedded System. Design of an embedded system based on the microprocessor studied in the theory of the subject. This embedded system has to include the complex peripheral design in assignment 1.

The assessment criteria for both the laboratory practices (laboratory lesson 5) and the two laboratory assignments are the following. All aspects must work and have been developed correctly to obtain the maximum mark. Additional functionality added by the student will be considered.

1) Functionality. (50 %)

Proved by:

· Basic functional simulations (without real delays) (10 %):

• Simulation of the “software” (only in embedded systems).

• Behavioural simulation of the different “hardware” circuits.

• Behavioural simulation of the complete embedded system (“hardware” +“software”) (only in embedded systems).

· Timing simulations (with real delays) (20 %)

• Timing simulation (“Post-route”) of the different “hardware” circuits.

• Timing simulation (“Post-route”) of the complete embedded system (“hardware” +“software”) (only in embedded systems).

· Tests on the development board. (20%)

• Board test of the different “hardware”circuits.

• Board test of the complex peripheral.

• Board test of the complete embedded system (“hardware” + “software”) (only in embedded systems).

2) Design correctness. (20%)

Proved by:

· Suitable “hardware” / “software" partitioning (only in embedded systems).

· Suitable distribution of tasks between the control unit and the ALU (only incomplex peripherals).

· Utilisation of the most suitable “hardware” circuits for each task.

· Suitable hierarchical organisation of the “hardware”.

· Application of synchronous design techniques.

· Optimisation of the VHDL description.

· Suitable structure of the assembler program, with the inclusion of thenecessary subroutines (only in embedded systems).

· Utilisation of the microprocessor interrupts when it is adequate (only inembedded systems).

3) Analysis of the FPGA implementation. (10%)

Analyse the FPGA logical resources used and their justification.

Analyse the internal system delays.

4) Documentation of the design and FPGA implementation. (20 %)

a. Report. It will be necessary to deliver a report of a maximum of 10 pages foreach of the laboratory lessons 5 to 7 that will have to follow the index supplied by the professor. In the report, all these things will be considered:

· Clear structure and order.

· Clear and sufficient explanations for the understanding of the work done.

· Inclusion of suitable and readable figures, included results of simulation.

· Inclusion of relevant data for the understanding of the work done.

b. Source design files.

· Enough comments in the VHDL files to explain the sentences used.

· Enough comments in the assembler files to be understood (only in embeddedsystems).

FINAL ASSESSMENT:

The students that opt for the final assessment (both at the end of the term or inJuly) will have to do a theoretical exam which consists of two parts and a laboratory exam individually.

To be allowed to do the laboratory exam, it is necessary to request it previously on the dates that will be communicated to the students through the FaiTIC website.

The students that opt for the final assessment will not be allowed to attend the theoretical exams that are hold during the term. Their laboratory tasks will not be evaluated during the term either.

The total mark will be the sum of the marks obtained in the different tasks of the subject.

To pass the subject, it is necessary that:

· The mark of each one of the theoretical exams is equal or greater than 4 over10.

· The mark of the laboratory exam is equal or greater than 4 over 10.

· The global mark of the subject is equal or greater than 5 over 10.

In case the students pass all the different tasks, the final mark (FM) will be the weighted sum of the marks of each part of the subject:

FM = 0.25* TE1 + 0.25 * TE2 + 0.50 * LE

In case the students do not pass any of the tasks of the subject (mark of any task <4), the final mark (FM) will be:

FM =Minimum [4.5; (0.25 * TE1 + 0.25 * TE2 + 0.50 * LE) ]

Being:

· TE1 = First partial theoretical examination.

· TE2 = Second partial theoretical examination.

· LE = Laboratory examination.

ASSESSMENT CRITERIA.

Theoretical examinations.

The first theoretical examination will be scheduled around the eighth week of classes in the place and date determined by the faculty. It will include practical problems and test questions on the topics of theoretical lessons 1 to 8 (except hardware/software partitioning from lesson 8).

The second theoretical examination will be scheduled together with the term’s final exam in the place and date determined by the faculty. It will include practical problems on all the topics that have been studied in the subject but,fundamentally, hardware/software partitioning from theoretical lesson 8 and theoretical lessons 9 to 11.

The students will have to answer all the exam questions correctly to obtain the maximum mark.

Laboratory exam (only for final assessment).

The examination will consist of the design of VHDL circuits and assembler programs for the microprocessor used in the subject. These circuits and programs may be part of a complex peripheral or an embedded system and will have a similar complexity to those designed in the laboratory lessons 5, 6 and 7 of the subject. The student will have to perform the simulations and board tests stipulated in the exam, during the time assigned.

The correct operation of the circuits and programs developed during the exam will be evaluated, as well as the correct application of the theoretical concepts to the work done, according to the assessment criteria.

It will be necessary to show the operation of each of the circuits and programs to the professor, in the laboratory.

The students will have to develop all the examquestions correctly to obtain the maximum mark.

Both during continuous assessment or final assessment, if exam copying or plagiarism in laboratory assignments are detected, the student will fail with the minimum mark (0) and the Head of Studies will be informed in case further action is appropriate.