Guia docente 2016_17
Escola de Enxeñaría de Telecomunicación
Degree in Telecommunications Technologies Engineering
 Subjects
  Programmable Electronic Circuits
   Assessment
  Description Qualification Training and Learning Results
Laboratory practises Design of digital circuits in VHDL and assembler programs.
It will be necessary to deliver the design source files and show the teacher in the laboratory the operation of each one of the circuits and programs.
The assessment will be based on the operation of the circuits and programs developed in the practical sessions corresponding to the laboratory lesson 5, according to the published criteria.
Through this methodology the outcomes CG3, CG4, CG13, CE7/TE2, CE8/T3, CE14/T9, CE15/T10, CT2 and CT3 are assessed.
10 B3
B4
B13
C7
C8
C14
C15
D2
D3
Tutored works Autonomous Project which consists of designing a complex peripheral. The peripheral must be composed of a control unit and an ALU and must be designed following the method analysed in the theoretical lesson 9.
The content corresponds with laboratory lesson 6.

The assessment will be based on the correct operation of the circuits and programs developed during the laboratory sessions assigned to lesson 6, as well as in the correct application of the theoretical concepts to the job done, according to the published criteria.

It will be necessary to show every circuit and program to the teacher in the laboratory.

Through this methodology the outcomes CG3, CG4, CG13, CE7/TE2, CE8/T3, CE14/T9, CE15/T10, CT2 and CT3 are assessed.
20 B3
B4
B13
C7
C8
C14
C15
D2
D3
Tutored works Autonomous Project which consists of designing a medium-complexity embedded digital system. The embedded system must be composed of a microprocessor and its peripherals, as well as the auxiliary circuits needed to work correctly. It will also be necessary to develop a program for the microprocessor in assembler language.
The content corresponds with laboratory lesson 7.

The assessment will be based on the correct operation of the circuits and programs developed during the laboratory sessions assigned to lesson 7, as well as in the correct application of the theoretical concepts to the job done, according to the published criteria.

It will be necessary to show every circuit and program to the teacher in the laboratory.

Through this methodology the outcomes CG3, CG4, CG13, CE7/TE2, CE8/T3, CE14/T9, CE15/T10, CT2 and CT3 are assessed.
20 B3
B4
B13
C7
C8
C14
C15
D2
D3
Long answer tests and development This exam will include two types of questions:

1) Multiple choice questions about the theoretical topics of the subjects.

2) Design problems about circuits and programs, explaining the work done

Through this methodology the outcomes CG3, CE14/T9 and CE15/T10 are assessed.
25 B3
C14
C15
Long answer tests and development Exam based on solving tasks and design problems about circuits and programs, explaining the work done

Through this methodology the outcomes CG3, CG4, CE14/T9 and CE15/T10 are assessed.
25 B3
B4
C14
C15
 
Other comments on the Evaluation

The final mark will be expressed in numerical form
ranging from 0 to 10, according to the valid regulation (Royal decree 1125/2003
of 5 September; BOE 18th September).

Following the guidelines of the degree the students
will be offered two assessment systems: continuous assessment and final
assessment.

 

CONTINUOUS EVALUATION:

The students are considered to have chosen the
continuous assessment when they have attended 2 laboratory sessions or 2 theoretical
sessions.

Laboratory class attendance is compulsory if the student has chosen continuous assessment.

The students who have chosen continuous
assessment can only miss two laboratory sessions as a maximum.

Theoretical class attendance is
considered crucial to achieve success in continuous assessment.

The fact of not attending theoretical classes alone will
not imply the loss of the right to continuous assessment, but the student will
have to study the theoretical concepts and prepare the laboratory practices on
their own.

Weekly
theoretical assignments will be given as homework. They must be handed in at
the beginning of the following sesión.

The students who attend theoretical classes regularly
(maximum of 2 absences) and hand in the theoretical assignments, will be given
the opportunity to repeat the first theoretical exam at the end of the term if
they do not pass it during the first term.

The students that have chosen continuous assessment,
but do not pass the course, will have to do the final assessment in July, that
is, they will have to repeat all the tasks, included those that had previously
passed.

The students that pass the course by means of
continuous assessment will not be allowed to repeat any task in the final
assessment in order to improve the mark.

The students will develop the laboratory practices and the laboratory projects in groups of two students
during the continuous assessment. Both students will be given the same mark.

The total mark will be the sum of the marks obtained
in the different tasks of the subject.

To pass the subject, it is necessary that:

·        
The mark of each one of the theoretical exams is equal
or greater than 5 over 10.

·        
The global mark of the laboratory tasks is equal or
greater than 5 over 10.

·        
The student performs all the tasks indicated in the
criteria assessment for both laboratory assignments.

·        
At least the timing simulation works properly in both
laboratory assignments.

·        
The different tasks have to be delivered on the date
specified by the professor, otherwise they will not be assessed.

In case the students pass all the different
tasks, the final mark (FM) will be the weighted sum of the marks of each part
of the subject:

FM = 0.25 * TE1 + 0.25 * TE2 + 0.10
* LP + 0.20 * AP1 + 0.20 * AP2

In case the students do not pass
any of the tasks of the subject (mark of any task < 5), the final mark (FM)
will be:

FM =
Minimum [4.5; (0.25 * TE1 +
0.25 * TE2 + 0.10 * LP + 0.20 * AP1 + 0.20 * AP2) ]

 

Being:

·        
TE1 = First partial theoretical
examination.

·        
TE2 = Second partial theoretical
examination.

·        
LP = Mark of the guided laboratory
practices corresponding to lessons 5.

·        
AP1 = Laboratory Autonomous
Project that consists of the design of a
complex peripheral.

·        
AP2 = Laboratory Autonomous
Project that consists of the design of a
medium-complexity embedded system.

 

FINAL ASSESSMENT:

The students that opt for the final assessment (both at the end
of the term or in July) will
have to do theoretical exam and a laboratory exam individually.

The students that opt for the final assessment will not
be allowed to attend the theoretical exams that are hold during the term. Their
laboratory tasks will not be evaluated during the term either.

The total mark will be the sum of the marks obtained
in the different tasks of the subject.

To pass the subject, it is necessary that:

·        
The mark of each one of the theoretical exams is equal
or greater than 5 over 10.

·        
The mark of the laboratory exam is equal or greater
than 5 over 10.

In case the students pass all the different
tasks, the final mark (FM) will be the weighted sum of the marks of each part
of the subject:

FM = 0.25 * TE1 + 0.25 * TE2 + 0.50
* LE

In case the students do not pass
any of the tasks of the subject (mark of any task < 5), the final mark (FM)
will be:

FM =
Minimum [4.5; (0.25 * TE1 +
0.25 * TE2 + 0.510 * LE) ]

 

Being:

·        
TE1 = First partial theoretical
examination.

·        
TE2 = Second partial theoretical
examination.

·        
LE = Laboratory examination.

 

COMMON FOR ALL THE STUDENTS:

ASSESSMENT CRITERIA.

Theoretical examinations.

The first theoretical examination will be scheduled
around the eighth week of classes in the place and date determined by the
professors and the faculty. It will include practical problems and test questions
on the topics that have been studied until the previous week of the exam
included.

The second theoretical examination will be scheduled
together with the final term exam in the place and date determined by the
faculty. It will include practical problems on all the topics that have been studied
in the subject

The students will have to answer all the exam
questions properly to obtain the maximum mark.

 

Laboratory
guided practices (only for continuous evaluation).

Only the correct operation of the circuits and
programs developed in the laboratory sessions which correspond to the
laboratory lesson 5 will be evaluated, according to the evaluation criteria.

The total mark of the assessable laboratory practices (LP)
corresponds to the 10% of the total mark of the subject. It will be necessary
to deliver the required source files.

 

Autonomous laboratory assignments (only for continuous evaluation).

Assignment 1. Complex peripheral. Design of a
peripheral for the microprocessor used in the subject. The peripheral has to be
formed by a control unit and an ALU, according to the method studied in the
theoretical lesson 9 of the subject.

Assignment 2. Embedded System. Design of an embedded
system based on the microprocessor studied in the theory of the subject. This embedded
system has to include the complex peripheral design in assignment 1.

The assessment criteria for both the laboratory practices
(laboratory lesson 5) and the two laboratory assignments are the following:

1)         Functionality.
(50 %)

Demonstrable by:

·        
Basic functional simulations (without real delays) (10
%):

•                    
Simulation of the “software” (only in embedded systems).

•                    
Behavioural simulation of the different “hardware”
circuits.

•                    
Behavioural simulation of the complete embedded system
(“hardware” + “software”) (only in embedded systems).

·        
Timing simulations (with real delays) (20 %)

•                    
Timing simulation (“Post-route”) of the different
“hardware” circuits.

•                    
Timing simulation (“Post-route”) of the complete embedded
system (“hardware” + “software”) (only in embedded systems).

·        
Tests on the development board. (20%)

•                    
Board test of the different “hardware”circuits.

•                    
Board test of the complex peripheral.

•                    
Board test of the complete embedded system (“hardware”
+ “software”) (only in embedded systems).

 

2) Design correctness. (20%)

Demonstrable by:

·        
Suitable “hardware” / “software" partitioning
(only in embedded systems).

·        
Suitable distribution of tasks between the control unit
and the ALU (only in complex peripherals).

·        
Utilisation of the most suitable “hardware” circuits for
each task.

·        
Suitable hierarchical organisation of the “hardware”.

·        
Application of synchronous design techniques.

·        
Optimisation of the VHDL description.

·        
Suitable structure of the assembler program, with the
inclusion of the necessary subroutines (only in embedded systems).

·        
Utilisation of the microprocessor interrupts when it is
adequate (only in embedded systems).

 

3)         Analysis
of the FPGA implementation. (10%)

Analyse the FPGA logical resources used and their
justification.

Analyse the internal system delays.

 

4)         Documentation
of the design and FPGA implementation. (20 %)

a.         Report.
It will be necessary to deliver a report of a maximum of 10 pages for each of
the laboratory lessons 5 to 7 that will have to follow the index supplied by
the professor. In the report, all these things will be considered:

·        
Clear structure and order.

·        
Clear and sufficient explanations for the
understanding of the work done.

·        
Inclusion of suitable and readable figures, included
results of simulation.

·        
Inclusion of relevant data for the understanding of
the work done.

b.         Source
design files.

·        
Enough comments in the VHDL files to explain the
sentences used.

·        
Enough comments in the assembler files to be understood
(only in embedded systems).

 

Laboratory exam (only for final assessment).

The examination will consist of the design of VHDL circuits
VHDL and assembler programs for the microprocessor used in the subject. These
circuits and programs may be part of a complex peripheral or an embedded system
and will have a similar complexity to those designed in the laboratory lessons
5, 6 and 7 of the subject. The student will have to perform the simulations and
board tests stipulated in the exam, during the time assigned.

The correct operation of the circuits and programs developed
during the exam will be evaluated, as well as the correct application of the
theoretical concepts to the work done, according to the assessment criteria.

It will be necessary to show the operation of each of
the circuits and programs to the professor, in the laboratory.

To pass this exam, it will be necessary:

• To develop all the tasks indicated in the exam.

• That at least the timing simulation works properly
in all the sections.

 

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