Guia docente 2023_24
Escola de Enxeñaría de Telecomunicación
Máster Universitario en Ingeniería de Telecomunicación
 Subjects
  Integrated Circuits Design and Manufacturing
   Contents
Topic Sub-topic
Chapter 1: Introduction (1h) Course introduction. Objectives and course planning. Basic concepts of microelectronic design of integrated circuits (ICs).
Chapter 2: Manufacturing sequence for ICs (1h) Introduction to ICs manufacturing. Planar technology. Manufacturing sequence of ICs in CMOS technology. Structure of MOS transistors. Manufacturing example: CMOS inverter. Masks pattern (layout). Technological design rules. Methodologies and tools for design assistance.
Chapter 3: Physical structure of basic devices and routing strategies (1h) Specification of the physical structure of MOS transistor. Specification of the physical structure of a resistor. Specification of the physical structure of a capacitor. Strategies for performing transistors with high aspect ratio. Strategies for matched transistors.
Chapter 4: Basic amplifier topologies (2h) Common source topology. Common drain topology. Common gate topology. Cascode topology. Push_Pull amplifier. Physical design examples.
Chapter 5: Current mirror (3h) Current sources. Basic structure of a current mirror. Analysis of functioning. Frequency response. Cascode topology. Physical design examples.
Chapter 6: Differential pair (3h) Differential pair structure. DC analysis. AC analysis. Specifications and design of the physical structure of a self-biased differential amplifier topology. Common mode rejection ratio. Matching of transistors. Slew rate limitations. Physical design examples.
Chapter 7: Operational amplifier (2h) Two stages operational amplifier. Design parameters. Operational Transconductance Amplifier (OTA). Examples of physical designs.
Chapter 8: Preparing for manufacturing (2h) Distribution in the base plane. Pad and terminals. Specification formats. Packages.

Laboratory session 1: Introduction to design tools for ICs (2h) Introduction to design tools for analog ICs. Current mirror example. Electric simulation. Design Rules Check (DRC) and layout extraction.
Laboratory session 2: Design of self-biased differential pair (2h) Electrical specification. Characterization of DC operating parameters. Characterization of AC operating parameters.
Laboratory session 3: Design of self-biased differential pair II (2h) DRC and layout extraction. Layout versus schematic (LVS). Post-layout simulation.
Laboratory session 4: Design of a transconductance amplifier (2h) Electrical Specification. Physical specification. Operation testing.
Laboratory session 5: Preparing for manufacturing (2h) For the circuit obtained in Laboratory session 4, perform the required steps to create the information needed in order to send the circuit to manufacture.
Reitoría | Campus Universitario | C.P. 36.310 Vigo (Pontevedra) | España | Tlf: +34 986 812 000 | informacion@uvigo.es            Accesibilidade | Aviso Legal