Guia docente 2016_17 Escola de Enxeñaría de Telecomunicación

Methodologies

	Description
Master Session	Conventional lectures. Through this methodology the outcomes CE11 and CE12 are developed.
Troubleshooting and / or exercises	Problem based learning (PBL): Problem solving. Design of synthesizable circuits in VHDL and software programs in C language. To solve them, the student has to previously develop certain outcomes. Through this methodology the outcomes CB5, CG1, CG8, CE11 and CE12 are developed.
Laboratory practises	VHDL design of digital circuits and circuit implementation in FPGAs and development of software programs in C language. Integration of both to build an embedded system in a FPGA. Through this methodology the outcomes CB5, CG8, CE11 and CE12 are developed.
Tutored works	Project based learning. The students must design an embedded system to solve a problem. In order to that, the students must plan, design and implement the necessary steps. Through this methodology the outcomes CB5, CG1, CG8, CE11 and CE12 are developed
Presentations / exhibitions	Exhibition of the results of the project developed. Through this methodology the outcomes CB5, CE11 and CE12 are developed.